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FPGA FLEX 6000 Family 24K Gates 1960 Cells 142.86MHz 0.42um Technology 3.3V 240-Pin PQFP. Мин.заказ=96
| CPLD Type | - |
| No. of Macrocells | 1960 |
| No. of I/O's | 199I/O's |
| Logic Case Style | QFP |
| No. of Pins | 240Pins |
| Frequency | 133MHz |
| Supply Voltage Min | 3V |
| Supply Voltage Max | 3.6V |
| Propagation Delay | - |
| Global Clock Setup Time | 1.6ns |
| Operating Temperature Min | 0°C |
| Operating Temperature Max | 85°C |
| Packaging | Each |
| Product Range | - |
| MSL | MSL 3 - 168 hours |
| SVHC | No SVHC (17-Dec-2015) |
| Core Supply Voltage Range | 4.75V to 5.25V |
| FPGA Family | FLEX 6000 |
| I/O Interface Standard | CMOS, TTL |
| Logic IC Base Number | 6024 |
| Logic IC Function | EPF6024A |
| No. of Gates | 24000 |
| No. of Logic Blocks | 196 |
| No. of Speed Grades | 3 |
| Operating Temperature Range | 0°C to +85°C |
| Programmable Logic Type | PLD |
| Supply Voltage | 3.3V |
| Supply Voltage Range | 3V to 3.6V |
| Termination Type | Surface Mount Device |
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