• FDG6301N
  • FDG6301N
  • FDG6301N
  • FDG6301N
  • FDG6301N
  • FDG6301N
  • FDG6301N
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These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.

polarityN-Channel, Dual N-Channel
input_capacitance9.50 pF
voltage_rating_dc25.0 V
breakdown_voltage_gate_to_source8.00 V
id_continuous_drain_current220 mA
gate_charge290 pC
breakdown_voltage_drain_to_source25.0 V
vds_drain_to_source_voltage25.0 V
current_rating220 mA
lead_free_statusLead Free
reach_svhc_complianceNo SVHC
mounting_styleSurface Mount
packagingCut Tape (CT)
rise_time4.50 ns
rds_drain_to_source_resistance_on4.00 Ω
lifecycle_statusActive
rohs_statusCompliant
pin_count6
power_dissipation300 mW
Transistor PolarityDual N Channel
Continuous Drain Current Id220mA
Drain Source Voltage Vds25V
On Resistance Rds(on)4ohm
Rds(on) Test Voltage Vgs4.5V
Threshold Voltage Vgs850mV
Power Dissipation Pd300mW
Transistor Case StyleSC-70
No. of Pins6Pins
Operating Temperature Max150°C
Product Range-
Automotive Qualification Standard-
MSLMSL 1 - Unlimited
SVHCNo SVHC (15-Jun-2015)
Continuous Drain Current Id, N Channel220mA
Current Id Max220mA
Drain Source Voltage Vds, N Channel25V
Module ConfigurationDual
On Resistance Rds(on), N Channel2.6ohm
Operating Temperature Min-55°C
Operating Temperature Range-55°C to +150°C
PackagingCut Tape
Termination TypeSurface Mount Device
Voltage Vds Typ25V
Voltage Vgs Max850mV
Voltage Vgs Rds on Measurement4.5V
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